N-CHANNEL DEPLETION-MODE INP FET WITH ENHANCED BARRIER HEIGHT GATES

被引：10

作者：

ILIADIS, AA ^{[1
]}

LEE, W ^{[1
]}

AINA, OA ^{[1
]}

机构：

[1] ALLIED SIGNAL AEROSP CO,CTR AEROSP TECHNOL,COLUMBIA,MD 21045

来源：

IEEE ELECTRON DEVICE LETTERS | 1989年 / 10卷 / 08期

关键词：

D O I：

10.1109/55.31760

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：370 / 372

页数：3

共 14 条

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[2]

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[6]

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[7]

LILE DL, 1978, ELECTRON LETT, V14, P658

[8] A DC TO 16GHZ INDIUM-PHOSPHIDE MISFET [J].

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SOLID-STATE ELECTRONICS, 1980, 23 (06) :551-&

[9] SELF-ALIGNED INVERSION-MODE INP MISFET [J].

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[10]

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