THE CHARACTERIZATION OF HOT-CARRIER DAMAGE IN P-CHANNEL TRANSISTORS

Damage in surface channel p-MOS transistors arising from hot-carrier stress is examined using a recently proposed lifetime extraction method. It is shown that the p-MOS behavior with respect to hot-carrier stress runs counter to that of n-MOS transistors in many respects and has to be considered separately. Not only are the well-known post-stress gains in drive current obtained for p-MOS transistors, but also the measurement of the I-V characteristics with the stress damage at the source and drain ends shows opposite effects to n-MOS devices. The reasons for this are explained in terms of Coulombic screening by the channel charge. Stressing transistors in inverter-like and pass transistor-like modes are also discussed, and it is found that p-MOS transistors are much more sensitive to pass transistor-like damage than n-channel devices, due to increased channel length shortening in the pass transistor mode. It is shown that whereas at long gate lengths (> 0.5 mum) the degradation is limited to drain current changes, at shorter channel lengths (<0.5 mum), significant threshold voltage shifts arise. It is concluded that the reliability of p-channel transistors will become an important issue in the deep-submicrometer gate length regime.