DISLOCATION GENERATION OF III-V-SEMICONDUCTORS BY THE BIAXIAL STRESS IN GAAS/SIO2, INP/SIO2 AND III-V/SI STRUCTURE

被引:4
作者
TACHIKAWA, M
MORI, H
机构
[1] NTT Opto-electronics Laboratories, Atsugi-shi, Kanagawa, 243-01, 3-1 Morinosato, Wakamiya
来源
JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS | 1991年 / 30卷 / 4A期
关键词
SIO2/GAAS; SIO2/INP; III-V/SI; GAAS/SI; HETEROEPITAXY; DISLOCATION; THERMAL MISMATCH; BIAXIAL STRESS;
D O I
10.1143/JJAP.30.L551
中图分类号
O59 [应用物理学];
学科分类号
摘要
Dislocation generation of III-V compound semiconductor crystals caused by the biaxial stress in SiO2 film on GaAs and InP wafers has been observed. The biaxial stress of around 10(8) dyn/cm2 generates dislocations of around 10(7) cm-2 above 450-degrees-C, which is the ordinary thin-film crystal growth temperature. The temperature dependence of critical stress for dislocation formation agreed with that reported for the upper yield stress of bulk III-V crystals. This shows that dislocation generation of III-V semiconductors basically occurs when the biaxial stress exceeds the upper yield stress of the materials. Comparing this experiment and the III-V/Si heteroepitaxy structure, it is suggested that the dislocation generation of III-V/Si in the cooling stage is also caused by thermal mismatch. Great thermal mismatches of GaAs and Si materials produce thermal stress sufficient for dislocation generation.
引用
收藏
页码:L551 / L554
页数:4
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