A HIGH-PERFORMANCE LATERAL BIPOLAR-TRANSISTOR FABRICATED ON SIMOX

被引:18
作者
PARKE, SA
HU, CM
KO, PK
机构
[1] Department of Electrical Engineering and Computer Science, University of California, Berkeley, CA
关键词
D O I
10.1109/55.215091
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Double-diffused. lateral n-p-n bipolar transistors were fabricated in a simple CMOS-like process using SIMOX silicon-on-insulator (SOI) substrates. Excellent device characteristics were achieved, with peak h(FE) = 120, BV(CEO) = 10 V, and peak f(T) = 4.5 GHz. The f(t) versus BV(CEO) trade-off was studied as a function of n- collector width. f(t) > 25 GHz is predicted for this structure with an improved device layout and optimized basewidth. This process may be easily extended in order to fabricate complementary BJT's in a C-BiCMOS thin-film SOI technology.
引用
收藏
页码:33 / 35
页数:3
相关论文
共 7 条
[2]  
HIGAKI N, 1991 S VLSI TECHN, P53
[3]   SILICON-ON-INSULATOR BIPOLAR-TRANSISTORS [J].
RODDER, M ;
ANTONIADIS, DA .
IEEE ELECTRON DEVICE LETTERS, 1983, 4 (06) :193-195
[4]  
SHAHIDI GG, 1991 IEDM, P663
[5]   A LATERAL SILICON-ON-INSULATOR BIPOLAR-TRANSISTOR WITH A SELF-ALIGNED BASE CONTACT [J].
STURM, JC ;
MCVITTIE, JP ;
GIBBONS, JF ;
PFEIFFER, L .
IEEE ELECTRON DEVICE LETTERS, 1987, 8 (03) :104-106
[6]   CMOS-COMPATIBLE LATERAL BIPOLAR-TRANSISTOR FOR BICMOS TECHNOLOGY .2. EXPERIMENTAL RESULTS [J].
TAMBA, A ;
SOMEYA, T ;
SAKAGAMI, T ;
AKIYAMA, N ;
KOBAYASHI, Y .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1992, 39 (08) :1865-1869
[7]  
VERDONCKTVANDEB.S, 1985 IEDM, P406