METHOD FOR DETERMINING THE EMITTER AND BASE SERIES RESISTANCES OF BIPOLAR-TRANSISTORS

被引：125

作者：

NING, TH

TANG, DD

机构：

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 1984年 / 31卷 / 04期

关键词：

D O I：

10.1109/T-ED.1984.21541

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：409 / 412

页数：4

共 16 条

[1]

BURGER RM, 1968, FUNDAMENTALS SILICON, V2, P115

[2] SIS TUNNEL EMITTER - THEORY FOR EMITTERS WITH THIN INTERFACE LAYERS [J].

DEGRAAFF, HC ;

DEGROOT, JG .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1979, 26 (11) :1771-1776

[3] LARGE-SIGNAL BEHAVIOR OF JUNCTION TRANSISTORS [J].

EBERS, JJ ;

MOLL, JL .

PROCEEDINGS OF THE INSTITUTE OF RADIO ENGINEERS, 1954, 42 (12) :1761-1772

[4] NEW TECHNIQUE FOR DETERMINATION OF STATIC EMITTER AND COLLECTOR SERIES RESISTANCES OF BIPOLAR-TRANSISTORS [J].

FILENSKY, W ;

BENEKING, H .

ELECTRONICS LETTERS, 1981, 17 (14) :503-504

[5] MEASUREMENT OF EMITTER AND COLLECTOR SERIES RESISTANCES [J].

GIACOLETTO, LJ .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1972, ED19 (05) :692-+

[6] HIGH-PERFORMANCE TRANSISTORS WITH ARSENIC-IMPLANTED POLYSIL EMITTERS [J].

GRAUL, J ;

GLASL, A ;

MURRMANN, H .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1976, 11 (04) :491-495

[7]

ISAAC RD, 1982, 1ST P INT S VLSI SCI, P298

[8] CHARACTERIZATION AND MODELING FOR STATISTICAL DESIGN [J].

LOGAN, J .

BELL SYSTEM TECHNICAL JOURNAL, 1971, 50 (04) :1105-+

[9] SELF-ALIGNED BIPOLAR-TRANSISTORS FOR HIGH-PERFORMANCE AND LOW-POWER-DELAY VLSI [J].

NING, TH ;

ISAAC, RD ;

SOLOMON, PM ;

TANG, DDL ;

YU, HN ;

FETH, GC ;

WIEDMANN, SK .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1981, 28 (09) :1010-1013

[10] EFFECT OF EMITTER CONTACT ON CURRENT GAIN OF SILICON BIPOLAR-DEVICES [J].

NING, TH ;

ISAAC, RD .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1980, 27 (11) :2051-2055

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