THE EFFECTS OF SOURCE DRAIN RESISTANCE ON DEEP SUBMICROMETER DEVICE PERFORMANCE

被引:11
作者
JENG, MC
CHUNG, JE
KO, PK
HU, CM
机构
[1] Department of Electrical Engineering and Computer Sciences, Electronics Research Laboratory, Univeristy of California, Berkeley
关键词
D O I
10.1109/16.62301
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
As MOSFET channel lengths approach the deep-submi-crometer regime, performance degradation due to parasitic source/drain resistance (Rsj) becomes an important factor to consider in device scaling. This brief examines the effects of Rsd on the device performance of deep-submicrometer non-LDD n-channel MOSFET’s. Reduction in the measured saturation drain current (Rsd = 600 Q/ira) relative to the ideal saturation current (Rsd = 0.0 Q ? ^m) is about 4% for Lc = 0.7 Mm and Tox = 15.6 am, and 10% for Leff = 0.3 Mm and Tox - 8.6 qm. Reduction of current in the linear regime and reduction of the simulated ring oscillator speed are both about 3 times higher. Silicidization of the source/drain is estimated to eliminate as much as 50% of the performance degradation. © 1990 IEEE
引用
收藏
页码:2408 / 2410
页数:3
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