ANALYSIS OF DRAIN BREAKDOWN VOLTAGE IN SOI N-CHANNEL MOSFETS

被引：6

作者：

HAOND, M ^{[1
]}

COLINGE, JP ^{[1
]}

机构：

[1] IMEC,B-3030 LOUVAIN,BELGIUM

来源：

ELECTRONICS LETTERS | 1989年 / 25卷 / 24期

关键词：

Electric Breakdown - Integrated Circuits; VLSI - Semiconducting Silicon - Transistors; Field Effect;

D O I：

10.1049/el:19891099

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The reduction of drain breakdown voltage in SOI nMOSFETs with floating substrate is related to the presence of a parasitic NPN bipolar structure, the base of which is the floating body of the device. Reduction of breakdown voltage (compared to the case where a body contact is used) is shown to be dependent on both channel length and minority carrier lifetime in the SOI material. Conversely, it is shown that mere measurement of MOSFET breakdown voltages can be used to extract the minority carrier lifetime in the SOI material.

引用

页码：1640 / 1641

页数：2

共 8 条

[1] SINGLE-TRANSISTOR LATCH IN SOI MOSFETS [J].