3-DIMENSIONAL STACKED MOS-TRANSISTORS BY LOCALIZED SILICON EPITAXIAL OVERGROWTH

Three-dimensionally integrated silicon-on-insulator MOS transistors were built employing localized silicon epitaxy. Key parameters for the growth of monocrystalline silicon over oxidized polysilicon gates to form channel regions for stacked devices were obtained. The interface between the buried oxide and the silicon overgrowth was characterized by C-V measurements, exhibiting interface state densities as low as 2 × 1011/eV·cm2 at mid-gap. A self-limiting planarization technique was developed to thin the overgrowth to less than 1 µm to facilitate the implementation of active devices. The quality of the crystalline material and the planarized surface was characterized by means of MOS transistors that exhibited hole mobilities (165 cm2/V · s) comparable to bulk material. Finally, field-effect operation of the buried interface comprised of the oxidized polysilicon and the overgrowth was demonstrated. © 1990 IEEE