A NEW INDEX-S FOR EVALUATING SOLDER JOINT THERMAL FATIGUE-STRENGTH

被引:3
作者
YASUKAWA, A
机构
[1] Mechanical Engineering Research Laboratory, Hitachi, Ltd., Tsuchiura
来源
IEEE TRANSACTIONS ON COMPONENTS HYBRIDS AND MANUFACTURING TECHNOLOGY | 1990年 / 13卷 / 04期
关键词
D O I
10.1109/33.62565
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
A new index named S is proposed for quick evaluation of thermal fatigue strength of solder joints in electronic equipment. If a joint is designed so that its S value is less than one, under a given thermal cycle condition, the inelastic strain range in the joint solder, including plastic and creep components, is less than 0.2%, which is small enough for most electronic equipment applications. In calculating S, the effects of the following factors are taken into account: 1) three-dimensional force and the moment acting on the joint, 2) dimensions of the joint, including the solder fillet height, and 3) temperature and hold time in the thermal cycle condition. To enable quick calculation of S, simple formulas of various types of joints, including lap, butt, J-lead, leadless type, and lead-insertion type joints, are derived. Good correlation is obtained between calculated S values and experimentally obtained thermal fatigue lifetime values. © 1990 IEEE
引用
收藏
页码:1146 / 1153
页数:8
相关论文
共 10 条
[1]  
CLECH JP, 1988, PROCEEDINGS OF THE TECHNICAL CONFERENCE : EIGHTH ANNUAL INTERNATIONAL ELECTRONICS PACKAGING CONFERENCE, P305
[2]   RELIABILITY FIGURES OF MERIT FOR SURFACE-SOLDERED LEADLESS CHIP CARRIERS COMPARED TO LEADED PACKAGES [J].
CLECH, JPM ;
ENGELMAIER, W ;
KOTLOWITZ, RW ;
AUGIS, JA .
IEEE TRANSACTIONS ON COMPONENTS HYBRIDS AND MANUFACTURING TECHNOLOGY, 1989, 12 (04) :449-458
[3]   FATIGUE LIFE OF LEADLESS CHIP CARRIER SOLDER JOINTS DURING POWER CYCLING [J].
ENGELMAIER, W .
IEEE TRANSACTIONS ON COMPONENTS HYBRIDS AND MANUFACTURING TECHNOLOGY, 1983, 6 (03) :232-237
[4]   INVESTIGATION OF SOLDER FATIGUE ACCELERATION FACTORS [J].
FOX, LR ;
SOFIA, JW ;
SHINE, MC .
IEEE TRANSACTIONS ON COMPONENTS HYBRIDS AND MANUFACTURING TECHNOLOGY, 1985, 8 (02) :275-282
[5]   STIFFNESS AND YIELDING IN THE PLCC J-LEAD [J].
GEE, SA ;
VANKESSEL, CGM .
IEEE TRANSACTIONS ON COMPONENTS HYBRIDS AND MANUFACTURING TECHNOLOGY, 1987, 10 (03) :379-390
[6]  
KOTLOWITZ RW, 1988, PROCEEDINGS OF THE TECHNICAL CONFERENCE : EIGHTH ANNUAL INTERNATIONAL ELECTRONICS PACKAGING CONFERENCE, P908
[7]   ELASTOPLASTIC ANALYSIS OF SURFACE-MOUNT SOLDER JOINTS [J].
LAU, JH ;
RICE, DW ;
AVERY, PA .
IEEE TRANSACTIONS ON COMPONENTS HYBRIDS AND MANUFACTURING TECHNOLOGY, 1987, 10 (03) :346-357
[8]   A VLSI CHIP MOUNTING STRUCTURE DESIGN BASED ON COMPUTER-SIMULATION BY HISETS [J].
YASUKAWA, A ;
KITANO, M ;
SAKAMOTO, T .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1988, 35 (11) :1802-1809
[9]  
YASUKAWA A, 1988, 1988 INT S POW SEM D, P36
[10]  
YASUKAWA A, 1989, 33RD MAT RES JOINT M, P144