ELIMINATION OF MESA-SIDEWALL GATE LEAKAGE IN INA1AS/INGAAS HETEROSTRUCTURES BY SELECTIVE SIDEWALL RECESSING

Conventional mesa isolation in InAlAs/InGaAs HFET's results in the gate coming in contact with the exposed channel at the mesa sidewall, forming a parasitic gate-leakage path. We propose and successfully demonstrate a novel and simple method of recessing the channel edge into the mesa sidewall using a succinic-acid-based selective etchant for InGaAs over InAlAs. SEM photographs confirm the recessing of the channel along the sidewall. Special heterostructure diodes, designed with varying amounts of mesa-sidewall/gate-metal overlap, were fabricated with and without the sidewall isolation step. Electrical measurements confirm the complete elimination of sidewall leakage on both diodes and HFET's.