NON-STEADY-STATE STUDIES ON MOS DEVICES SUBJECT TO A LINEAR VOLTAGE RAMP

Experimental studies of MOS capacitors subject to linear voltage ramps so as to drive the devices into the non-steady-state are presented. The resulting current-voltage characteristics, which are extremely rich in structure, are shown to be strongly dependent on temperature and voltage sweep rate. Furthermore, the characteristics, which are related to electron-hole pair generation in the depletion region of the silicon, correlate extremely well with the appropriate theoretical curves over a wide range of temperatures and sweep rates. Consequently, the technique is shown to be a sensitive means of determining information on the trap parameters of generation centers present in the silicon bulk.