A FRAMEWORK TO EVALUATE TECHNOLOGY AND DEVICE DESIGN ENHANCEMENTS FOR MOS INTEGRATED-CIRCUITS

被引：10

作者：

SODINI, CG

WONG, SS

KO, PK

机构：

[1] STANFORD UNIV,DEPT ELECT ENGN,STANFORD,CA 94305

[2] UNIV CALIF BERKELEY,DEPT ELECT ENGN & COMP SCI,BERKELEY,CA 94720

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1989年 / 24卷 / 01期

关键词：

D O I：

10.1109/4.16311

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：118 / 127

页数：10

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[9] THE EFFECT OF HIGH FIELDS ON MOS DEVICE AND CIRCUIT PERFORMANCE [J].

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[10] CHARGE ACCUMULATION AND MOBILITY IN THIN DIELECTRIC MOS-TRANSISTORS [J].

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