MODELING AND CHARACTERIZATION OF GATE OXIDE RELIABILITY

被引：252

作者：

LEE, JC ^{[1
]}

CHEN, IC ^{[1
]}

HU, CM ^{[1
]}

机构：

[1] UNIV CALIF BERKELEY,DEPT ELECT ENGN & COMP SCI,BERKELEY,CA 94720

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 1988年 / 35卷 / 12期

关键词：

Semiconductor Devices - Semiconductor Materials;

D O I：

10.1109/16.8802

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A technique of predicting the lifetime of an oxide to different voltages, different oxide areas, and different temperatures is presented. Using the defect density model in which defects are modeled as effective oxide thinning, many reliability parameters such as yield, failure rate, and screen time/screen yield can be predicted. This modeling procedure is applicable to both wafer-level and long-term reliability tests. Process improvements including defect gettering and alternative dielectrics such as chemical-vapor-deposited oxides are evaluated in the format of defect density as a function of effective oxide thinning.

引用

页码：2268 / 2278

页数：11

共 36 条

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