AN OPTIMAL ANNEALING TECHNIQUE FOR OHMIC CONTACTS TO ION-IMPLANTED N-LAYERS IN SEMIINSULATING INDIUM-PHOSPHIDE

被引：11

作者：

PANDE, KP

MARTIN, E

GUTIERREZ, D

AINA, O

机构：

[1] Allied Corp, Columbia, MD, USA, Allied Corp, Columbia, MD, USA

来源：

SOLID-STATE ELECTRONICS | 1987年 / 30卷 / 03期

关键词：

D O I：

10.1016/0038-1101(87)90180-8

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：253 / 258

页数：6

共 12 条

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[2] ALLOYED OHMIC CONTACTS TO GAAS [J].

BRASLAU, N .

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[3] A NONALLOYED, LOW SPECIFIC RESISTANCE OHMIC CONTACT TO N-INP [J].

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BARNES, PA ;

STAYT, JW .

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[4]

HEIBLUM M, 1982, SOLID STATE ELECTRON, V25, P185, DOI 10.1016/0038-1101(82)90106-X

[5] NONALLOYED OHMIC CONTACTS TO SI-IMPLANTED GAAS ACTIVATED USING SIOXNY CAPPED INFRARED RAPID THERMAL ANNEALING [J].

KUZUHARA, M ;

NOZAKI, T ;

KOHZU, H .

JOURNAL OF APPLIED PHYSICS, 1985, 58 (03) :1204-1209

[6]

LAKHANI AA, 1985, ELECTRON DEV LETT

[7] LOW-POWER HIGH-SPEED INP MISFET DIRECT-COUPLED FET LOGIC [J].

MESSICK, LJ .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1984, 31 (06) :763-766

[8] HIGH MOBILITY N-CHANNEL METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTORS BASED ON SIO2-INP INTERFACE [J].

PANDE, KP ;

NAIR, VKR .

JOURNAL OF APPLIED PHYSICS, 1984, 55 (08) :3109-3114

[9] HIGH-SPEED INTEGRATED-CIRCUITS BASED ON INP-MISFETS WITH PLASMA SIO2 GATE INSULATOR [J].

PANDE, KP ;

GUTIERREZ, D .

SOLID-STATE ELECTRONICS, 1985, 28 (10) :1045-1048

[10] OHMIC CONTACTS TO LIGHTLY DOPED NORMAL-INDIUM AND PARA-INDIUM PHOSPHIDE SURFACES [J].

TSENG, W ;

CHRISTOU, A ;

DAY, H ;

DAVEY, J ;

WILKINS, B .

JOURNAL OF VACUUM SCIENCE & TECHNOLOGY, 1981, 19 (03) :623-625

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