LOCALLY ION-IMPLANTED JFET IN AN INGAAS/INP P-I-N PHOTODIODE LAYER STRUCTURE FOR A MONOLITHICALLY PLANAR INTEGRATED RECEIVER OEIC

A novel planar concept for the monolithic integration of a p-i-n photodiode (PD) and a junction field-effect transistor (JFET) is described. In an otherwise optimized InGaAs/InP PD layer sequence, grown by metalorganic vapor-phase epitaxy (MOVPE), a local Si- and Be-ion implantation has been performed to realize a thin n+-doped channel layer and a buried p-layer for the JFET. JFETs (1.6 x 290-mu-m) have a maximum transconductance of 100 mS/mm and a cutoff frequency of 7 GHz. PDs with 64-mu-m diameter show a dark current of 1 nA at -10 V, a responsivity of 1.1 A/W and a 3 dB bandwidth of 7.6 GHz. The PD-JFET combination exhibits a clear open eye pattern at 200 Mb/s. A receiver sensitivity of -35 dBm for a BER of 10(-9) is estimated.