Hole mobility enhancement in strained-Si p-MOSFETs under high vertical field

被引：53

作者：

Maiti, CK ^{[1
]}

Bera, LK ^{[1
]}

Dey, SS ^{[1
]}

Nayak, DK ^{[1
]}

Chakrabarti, NB ^{[1
]}

机构：

[1] INDIAN INST TECHNOL,DEPT ELECT & ELECT COMMUN ENGN,KHARAGPUR 721302,W BENGAL,INDIA

来源：

SOLID-STATE ELECTRONICS | 1997年 / 41卷 / 12期

关键词：

D O I：

10.1016/S0038-1101(97)00152-4

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The growth of a high quality, step-graded lattice-relaxed SiGe buffer layer on a Si(100) substrate is investigated. p-MOSFETs were fabricated on strained-Si grown on top of the above layer. Carrier confinement at the type-II strained-Si/SiGe buffer interface is observed clearly from the device transconductance and C-V measurements. At high vertical field, compared to bulk silicon, the channel mobility of the strained-Si device with x = 0.18 is found to be about 40% and 200% higher at 300 K and 77 K respectively. Measurements on transconductance enhancement are also reported. Data at 77 K provide evidence of two channels and a large enhancement of mobility at high transverse field. (C) 1997 Elsevier Science Ltd.

引用

页码：1863 / 1869

页数：7

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