Validity of constant voltage stress based reliability assessment of high-k devices

被引：45

作者：

Lee, BH ^{[1
]}

Choi, R ^{[1
]}

Sim, JH ^{[1
]}

Krishnan, SA ^{[1
]}

Peterson, JJ ^{[1
]}

Brown, GA ^{[1
]}

Bersuker, G ^{[1
]}

机构：

[1] SEMATECH, Austin, TX 78749 USA

来源：

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY | 2005年 / 5卷 / 01期

关键词：

bias temperature instability (BTI); charge trapping; high-k; dielectrics; hot-carrier injection (HCI); metal gate; reliability; time-dependent dielectric breakdown (TDDB);

D O I：

10.1109/TDMR.2005.845807

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Charge trapping in high-kappa gate dielectrics affects the result of electrical characterization significantly. DC mobility degradation and device threshold voltage instability and C-V and I-V hysteresis are a few examples. The charging effects in high-kappa gate dielectric also affect the validity of conventional reliability test methodologies developed for SiO2 devices. In this paper, we review high-kappa materials specific phenomena that can affect the validity of constant-voltage-stress-based reliability test methods to address the direction of future reliability study on high-kappa devices.

引用

页码：20 / 25

页数：6

共 23 条

[1] Interfacial layer-induced mobility degradation in high-k transistors [J].