共 14 条
- [1] [Anonymous], METIS SERIAL GRAPH P
- [2] 3D processing technology and its impact on iA32 microprocessors [J]. IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS & PROCESSORS, PROCEEDINGS, 2004, : 316 - 318
- [3] Das S, 2003, ASP-DAC 2003: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, P53, DOI 10.1109/ASPDAC.2003.1194993
- [5] Through wafer interconnects on active pmos devices [J]. 2004 IEEE WORKSHOP ON MICROELECTRONIC AND ELECTRON DEVICES, 2004, : 82 - 84
- [6] Kanda K, 2003, ISSCC DIG TECH PAP I, V46, P186
- [7] KIM T, 2004, P S MAT INT PACK ISS, V833
- [8] A 3-D stacked chip packaging solution for miniaturized massively parallel processing [J]. IEEE TRANSACTIONS ON ADVANCED PACKAGING, 1999, 22 (03): : 424 - 432
- [9] 4 Gbps high-density AC coupled interconnection (Invited paper) [J]. PROCEEDINGS OF THE IEEE 2002 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2002, : 133 - 140
- [10] MIRUA N, 2004, P IEEE CUST INT CIRC, P99