2-GHz/2-mW and 12-GHz/30-mW dual-modulus prescalers in silicon bipolar technology

被引：10

作者：

Knapp, H ^{[1
]}

Böck, J

Wurzer, M

Ritzberger, G

Aufinger, K

Treitinger, L

机构：

[1] Infineon Technol AG, Corp Res, D-81730 Munich, Germany

[2] Infineon Technol AG, Wireless Product, D-81730 Munich, Germany

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2001年 / 36卷 / 09期

关键词：

current-mode logic; dual-modulus prescaler; frequency division; low power consumption; microwave bipolar integrated circuits;

D O I：

10.1109/4.944671

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Two dual-modulus prescalers manufactured in a low-cost silicon bipolar technology are presented. The first circuit is optimized for low power consumption and operates up to 2 GHz at a power consumption of 2 mW. The second prescaler is optimized for high speed and operates up to 12 GHz with a power consumption of 30 mW. The prescalers have selectable divide ratios of 128/129 and 256/257, respectively.

引用

页码：1420 / 1423

页数：4

共 14 条

[1] A 1.5GHz, Sub-2mW CMOS dual-modulus prescaler [J].

Benachour, A ;

Embabi, SHK ;

Ali, A .

PROCEEDINGS OF THE IEEE 1999 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1999, :613-616

[2]

Bock J., 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318), P553, DOI 10.1109/IEDM.1999.824214

[3] A low-power and low-noise CMOS prescaler for 900 MHz to 1.9 GHz wireless applications [J].

Chang, WH ;

Pehlke, DR ;

Yu, R .

PROCEEDINGS OF THE IEEE 1999 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1999, :597-600

[4] A 1.75-GHz/3-V dual-modulus divide-by-128/129 prescaler in 0.7-mu m CMOS [J].

Craninckx, J ;

Steyaert, MSJ .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1996, 31 (07) :890-897

[5]

DEMUER B, 1998, P 1998 EUR SOL STAT, P256

[6] A 1-GHZ/0.9-MW CMOS SIMOX DIVIDE-BY-128 129 DUAL-MODULUS PRESCALER USING A DIVIDE-BY-2/3 SYNCHRONOUS COUNTER [J].

KADO, Y ;

SUZUKI, M ;

KOIKE, K ;

OMURA, Y ;

IZUMI, K .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1993, 28 (04) :513-517

[7] SiGe bipolar 5.5GHz dual-modulus prescaler [J].

Klepser, BU .

ELECTRONICS LETTERS, 1999, 35 (20) :1728-1730

[8]

Knapp H, 1998, 1998 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN - PROCEEDINGS, P20, DOI 10.1109/LPE.1998.708149

[9] A 5.3-GHz programmable divider for HiPerLAN in 0.25-μm CMOS [J].

Krishnapura, N ;

Kinget, PR .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2000, 35 (07) :1019-1024

[10] An ultralow-power-consumption, high-speed, GaAs 256/258 dual-modulus prescaler IC [J].

Maeda, T ;

Wada, S ;

Tokushima, M ;

Ishikawa, M ;

Yamazaki, J ;

Fujii, M .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1999, 34 (02) :212-218

← 1 2 →