Gate bias stress in pentacene field-effect-transistors: Charge trapping in the dielectric or semiconductor

被引：76

作者：

Hausermann, R. ^{[1
]}

Batlogg, B. ^{[1
]}

机构：

[1] ETH, Solid State Phys Lab, CH-8093 Zurich, Switzerland

来源：

APPLIED PHYSICS LETTERS | 2011年 / 99卷 / 08期

关键词：

THIN-FILM TRANSISTORS; THRESHOLD VOLTAGE SHIFTS; AMORPHOUS FLUOROPOLYMER; TEMPERATURE; INSULATORS; TRANSPORT; CRYSTALS; DYNAMICS; DEVICES;

D O I：

10.1063/1.3628297

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

Gate bias stress instability in organic field-effect transistors (OFETs) is a major conceptual and device issue. This effect manifests itself by an undesirable shift of the transfer characteristics and is associated with long term charge trapping. We study the role of the dielectric and the semiconductor separately by producing OFETs with the same semiconductor (pentacene) combined with different dielectrics (SiO2 and Cytop). We show that it is possible to fabricate devices which are immune to gate bias stress. For other material combinations, charge trapping occurs in the semiconductor alone or in the dielectric. (C) 2011 American Institute of Physics. [doi:10.1063/1.3628297]

引用

页数：3

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