Dual-metal gate CMOS technology with ultrathin silicon nitride gate dielectric

被引:83
作者
Yeo, YC [1 ]
Lu, Q
Ranade, P
Takeuchi, H
Yang, KJ
Polishchuk, I
King, TJ
Hu, C
Song, SC
Luan, HF
Kwong, DL
机构
[1] Univ Calif Berkeley, Dept Elect Engn & Comp Sci, Berkeley, CA 94720 USA
[2] Univ Calif Berkeley, Dept Mat Sci & Engn, Berkeley, CA 94720 USA
[3] Univ Texas, Dept Elect & Comp Engn, Austin, TX 78712 USA
关键词
CMOSFETs; dielectric materials; dual-metal gate; molybdenum; titanium; titanium compounds;
D O I
10.1109/55.919237
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We report the first demonstration of a dual-metal gate complementary metal oxide semiconductor (CMOS technology using titanium (Ti) and molybdenum (Mo) as the gate electrodes for the N-metal oxide semiconductor field effect transistors (N-MOSFETs) and P-metal oxide semiconductor held effect transistors (P-MOSFETs), respectively. The gate dielectric stack consists of a silicon oxy-nitride interfacial layer and a silicon nitride (Si3N4) dielectric layer formed by a rapid-thermal chemical vapor deposition (RTCVD) process. C-V characteristics show negligible gate depletion. Carrier mobilities comparable to that predicted by the universal mobility model for silicon dioxide (SiO2) are observed.
引用
收藏
页码:227 / 229
页数:3
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