共 11 条
- [3] Josse E., 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318), P661, DOI 10.1109/IEDM.1999.824239
- [4] Dual-metal gate technology for deep-submicron CMOS transistors [J]. 2000 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, 2000, : 72 - 73
- [5] WORK FUNCTION OF ELEMENTS AND ITS PERIODICITY [J]. JOURNAL OF APPLIED PHYSICS, 1977, 48 (11) : 4729 - 4733
- [6] SiON/Ta2O5/TiN gate-stack transistor with 1.8nm equivalent SiO2 thickness [J]. INTERNATIONAL ELECTRON DEVICES MEETING 1998 - TECHNICAL DIGEST, 1998, : 381 - 384
- [7] RANADE P, 2000, P GAT STACK ISS SIL, V611
- [9] Semiconductor Industry Association, 1999, INT TECHN ROADM SEM
- [10] Ultra thin (<20Å) CVD Si3N4 gate dielectric for deep-sub-micron CMOS devices [J]. INTERNATIONAL ELECTRON DEVICES MEETING 1998 - TECHNICAL DIGEST, 1998, : 373 - 376