Feasibility of an isolation by local oxidation of silicon without field implant

被引:8
作者
Fay, JL
Beluch, J
Despax, B
Sarrabayrouse, G
机构
[1] Motorola Semicond SA, F-31023 Toulouse, France
[2] Lab Genie Elect Toulouse, F-31062 Toulouse, France
[3] Lab Anal & Architecture Syst, CNRS, UPR 8001, F-31077 Toulouse, France
关键词
local oxidation of silicon; field implant; nitride; silicon; field inversion; PECVD oxide;
D O I
10.1016/S0038-1101(00)00260-4
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Field inversion in local oxidation of silicon regions of a CMOS integrated circuit is generally avoided thanks to a field implant. In this paper the feasibility of an implant-free isolation is studied. The parasitic charge in the interlayer dielectrics is attributed to the diffusion during nitride deposition of hydrogen which react with carbon in the underlying plasma oxide. Using a PECVD nitride as the upper layer of the inter-layer dielectrics allows to maintain the leakage current at an acceptable level. (C) 2001 Elsevier Science Ltd. All rights reserved.
引用
收藏
页码:1257 / 1263
页数:7
相关论文
共 12 条
[1]  
BRISSET C, 1996, IEEE T NUCL SCI, V43, P861
[2]  
BUTLER J, 1990, P 7 INT IEEE VLSI MU, P387
[3]   Comprehensive analysis of an isolation area obtained by local oxidation of silicon without field implant [J].
Fay, JL ;
Beluch, J ;
Allirand, L ;
Brosset, D ;
Despax, B ;
Bafleur, M ;
Sarrabayrouse, G .
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1999, 38 (9A) :5012-5017
[4]  
FAY JL, 2001, IN PRESS JPN J APPL, V40
[5]   Charge pumping analysis of radiation effects in LOCOS parasitic transistors [J].
Flament, O ;
Autran, JL ;
Paillet, P ;
Roche, P ;
Faynot, O ;
Truche, R .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1997, 44 (06) :1930-1938
[6]   INTERFACE TRAPS AND PB CENTERS IN OXIDIZED (100) SILICON-WAFERS [J].
GERARDI, GJ ;
POINDEXTER, EH ;
CAPLAN, PJ ;
JOHNSON, NM .
APPLIED PHYSICS LETTERS, 1986, 49 (06) :348-350
[7]   EFFECT OF DEVICE PROCESSING CONDITIONS ON EXTENDED DISLOCATIONS AND DEFECTS IN TI-SALICIDED SOURCE/DRAIN REGIONS OF SILICON INTEGRATED-CIRCUITS [J].
GULDI, RL .
JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1993, 140 (12) :3650-3657
[8]   FIELD INVERSION GENERATED IN THE CMOS DOUBLE-METAL PROCESS DUE TO PETEOS AND SOG INTERACTIONS [J].
HSU, SL ;
LIU, LM ;
FANG, CH ;
YING, SL ;
CHEN, TL ;
LIN, MS ;
CHANG, CY .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1993, 40 (01) :49-53
[9]  
KERN W, 1985, SOLID STATE TECHNOL, P171
[10]   Process integration of an interlevel dielectric (ILDO) module using a building-in reliability approach [J].
Paulsen, RE ;
Kyono, CS ;
Wang, Y ;
Klein, KM ;
Lim, IS ;
Tinkler, S ;
Bellamak, B ;
Odle, DW ;
Zhou, ZX ;
Dahl, P ;
Giovanetto, M ;
Makwana, J ;
Patel, S ;
Reno, C ;
Lenahan, PM ;
Billman, CA .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1998, 45 (03) :655-664