Si single-electron tunneling transistor with nanoscale floating dot stacked on a Coulomb island by self-aligned process

被引:14
作者
Nakajima, A [1 ]
Futatsugi, T [1 ]
Kosemura, K [1 ]
Fukano, T [1 ]
Yokoyama, N [1 ]
机构
[1] Fujitsu Labs Ltd, Atsugi, Kanagawa 2430197, Japan
来源
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B | 1999年 / 17卷 / 05期
关键词
D O I
10.1116/1.590886
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We studied experimentally and theoretically in detail a Si single-electron tunneling transistor which has a nanoscale floating dot gate stacked on a Coulomb island by a self-aligned process. At 4.2 K, this device exhibits drain current (Id) oscillations due to the Coulomb blockade effect besides the quantized threshold voltage (Vth) shifts with a hysteresis resulting from a single-electron tunneling between the channel and the floating dot gate. The periodicity of the Coulomb oscillation, the voltage separation (Delta V-w) between the adjacent two voltages where the Vth Shift occurs are consistent with those calculated from the geometrical consideration. The Coulomb oscillation disappeared at room temperature, however, the quantized V-th shifts and hysteresis curves, which are basic operations of single-electron memory, were observed up to room temperature. The fluctuation of electron number in the floating dot was theoretically analyzed at room temperature and we obtained consistent results with the experiments. The high on/off current ratio of the Coulomb oscillation combined with the quantized V-th shifts suggests that it might be possible to produce a memory with ultralow power consumption. (C) 1999 American Vacuum Society.
引用
收藏
页码:2163 / 2171
页数:9
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