Extremely scaled double-gate CMOS performance projections, including GIDL-controlled off-state current

被引：20

作者：

Fossum, JG ^{[1
]}

Kim, K ^{[1
]}

Chong, Y ^{[1
]}

机构：

[1] Univ Florida, Dept Elect & Comp Engn, Gainesville, FL 32611 USA

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 1999年 / 46卷 / 11期

关键词：

double-gate MOSFET's; GIDL; off-state current; scaled CMOS;

D O I：

10.1109/16.796296

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A simulation-based analysis of extremely scaled double-gate (DG) CMOS, emphasizing the effects of gate-induced drain leakage (GIDL) in DG MOSFET's, is described. Device and ring-oscillator simulations project an enormous performance potential for DG/CMOS, but also show how and why GIDL can be much more detrimental to off-state current in DG devices than in the single-gate counterparts. However, for asymmetrical (n(+) and p(+) polysilicon) gates, the analysis further shows that the GIDL effect can be controlled by tailoring the back (p(+)-gate) oxide thickness, which implies design optimization regarding speed as well as static power in DG/CMOS circuits.

引用

页码：2195 / 2200

页数：6

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