On the origin of the dispersion of erased threshold voltages in flash EEPROM memory cells

被引：7

作者：

Esseni, D ^{[1
]}

Riccò, B ^{[1
]}

机构：

[1] Univ Bologna, DEIS, I-40136 Bologna, Italy

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2000年 / 47卷 / 05期

关键词：

erasing operation; flash EEPROM; thresholds dispersion; tunneling currents dispersion;

D O I：

10.1109/16.841251

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This work investigates the origin of the dispersion of tunnel-erased threshold voltages (V-T) in flash EEPROM memory cells. A clear correlation between cell-to-cell variations of tunnel current I-T. and dispersion of erased V-T is demonstrated by looking at the I-T characteristics and the erasing characteristics corresponding to channel and source injection as well as at the dependence of I-T and V-T dispersion on device area and tunnel polarity. Experimental evidence is provided that nonuniform injection at polySi/SiO2 interface is a major cause of erased V-T dispersion.

引用

页码：1120 / 1123

页数：4

共 11 条

[1] EVIDENCE FOR SURFACE ASPERITY MECHANISM OF CONDUCTIVITY IN OXIDE GROWN ON POLYCRYSTALLINE SILICON [J].