Low-Temperature Formation of High-Quality GeO2 Interlayer for High-κ Gate Dielectrics/Ge by Electron-Cyclotron-Resonance Plasma Techniques

被引：46

作者：

Fukuda, Yukio ^{[1
]}

Yazaki, Yuya ^{[1
]}

Otani, Yohei ^{[1
]}

Sato, Tetsuya ^{[2
]}

Toyota, Hiroshi ^{[3
]}

Ono, Toshiro ^{[3
]}

机构：

[1] Tokyo Univ Sci, Fac Syst Engn, Nagano 3910292, Japan

[2] Univ Yamanashi, Clean Energy Res Ctr, Kofu, Yamanashi 4008510, Japan

[3] Hirosaki Univ, Fac Sci & Technol, Hirosaki, Aomori 0368561, Japan

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2010年 / 57卷 / 01期

关键词：

Aluminum oxide; gate dielectrics; germanium; germanium oxide; INTERFACE; ENERGY; OXIDATION;

D O I：

10.1109/TED.2009.2035030

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We have fabricated an Al2O3/GeO2 gate-dielectric stack on p-type Ge by electron-cyclotron-resonance plasma oxidation and sputtering without external substrate heating. We show that the midgap interface state density at the GeO2/Ge interface is 4.5 x 10(10) cm(-2) . eV(-1). The hysteresis observed in capacitance-voltage measurements is reduced to 50 mV when the gate bias is swept from accumulation to inversion and back to accumulation or after a single dummy sweep from inversion to accumulation, indicating the possibility that the bulk oxide traps causing the hysteresis are deactivated by the injected holes. The band gap of GeO2 was determined by internal photoemission measurements to be 4.7 eV. The conduction-and valence-band offsets at the GeO2/Ge interface are moderately symmetric and large with values of 1.8 and 2.2 eV, respectively. These promising results suggest that low-temperature plasma-grown GeO2 is a suitable interlayer between high-dielectric-constant dielectrics and Ge.

引用

页码：282 / 287

页数：6

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