0.1-μm p+-GaAs gate HJFET's fabricated using two-step dry-etching and selective MOMBE growth techniques

This paper reports the first successful fabrication of high-performance, 0.1-mu m p(+)-gate pseudomorphic heterojunction-FET's (HJFET's), By introducing the two-step dry-etching technique which compensates for the poor dry-etching resistance of PMMA, 0.1-mu m or less gate-openings with a high aspect-ratio of 3.5 in SiO2 film are achieved. In addition, by using the gate-electrode filling technique with selective MOMBE p(+)-GaAs growth, 0.1-mu m voidless p(+)-GaAs gate electrodes with a high aspect-ratio are achieved for the first time. The fabrication technology leads to a reduction of external gate fringing capacitance (C-f(ext)) in a T-shaped gate-structure and an improvement in gate turn-on voltage. The fabricated 0.1-mu m, T-shaped, p(+)-gate n-Al0.2Ga0.8As/In0.25Ga0.75As HJFET exhibits a high gate turn-on voltage (V-f) of about 0.9 V, and a good gm(max) of 435 mS/mm, Also, an excellent microwave performance of f(T) = 121 GHz and f(max) = 144 GHz is achieved due to the C-f(ext) reduction. The technology and device show great promise for future high-speed applications, such as in power devices, MMIC's, and digital IC's.