A HIGH-SPEED 64KX4 CMOS DRAM USING ON-CHIP SELF-TIMING TECHNIQUES

被引：3

作者：

KOBAYASHI, T

ARIMOTO, K

IKEDA, Y

HATANAKA, M

MASHIKO, K

YAMADA, M

NAKANO, T

机构：

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1986年 / 21卷 / 05期

关键词：

D O I：

10.1109/JSSC.1986.1052591

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：655 / 661

页数：7

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