DESIGN-MODEL FOR BULK CMOS SCALING ENABLING ACCURATE LATCHUP PREDICTION

被引:17
作者
WIEDER, AW
WERNER, C
HARTER, J
机构
关键词
D O I
10.1109/T-ED.1983.21107
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
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页码:240 / 245
页数:6
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