MODELING OF LITHOGRAPHY RELATED YIELD LOSSES FOR CAD OF VLSI CIRCUITS

被引：73

作者：

MALY, W

机构：

来源：

关键词：

D O I：

10.1109/TCAD.1985.1270112

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

引用

页码：166 / 177

页数：12

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[9] MODELING OF INTEGRATED-CIRCUIT DEFECT SENSITIVITIES [J].

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