DEVICE DESIGN CONSIDERATIONS FOR ION-IMPLANTED N-CHANNEL MOSFETS

被引:35
作者
RIDEOUT, VL [1 ]
GAENSSLEN, FH [1 ]
LEBLANC, A [1 ]
机构
[1] IBM CORP,THOMAS J WATSON RES CTR,SEMICOND DEVICE & PROC DESIGN GRP,YORKTOWN HTS,NY 10598
关键词
D O I
10.1147/rd.191.0050
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
引用
收藏
页码:50 / 59
页数:10
相关论文
共 11 条
[1]   LOW-LEVEL CURRENTS IN INSULATED GATE FIELD-EFFECT TRANSISTORS [J].
BARRON, MB .
SOLID-STATE ELECTRONICS, 1972, 15 (03) :293-+
[2]   N-TYPE SURFACE CONDUCTIVITY ON P-TYPE GERMANIUM [J].
BROWN, WL .
PHYSICAL REVIEW, 1953, 91 (03) :518-527
[3]   DESIGN AND CHARACTERISTICS OF N-CHANNEL INSULATED-GATE FIELD-EFFECT TRANSISTORS [J].
CRITCHLOW, DL ;
DENNARD, RH ;
SCHUSTER, SE .
IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 1973, 17 (05) :430-442
[4]   DESIGN OF ION-IMPLANTED MOSFETS WITH VERY SMALL PHYSICAL DIMENSIONS [J].
DENNARD, RH ;
GAENSSLEN, FH ;
YU, HN ;
RIDEOUT, VL ;
BASSOUS, E ;
LEBLANC, AR .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1974, SC 9 (05) :256-268
[5]   THRESHOLD VOLTAGE OF NONUNIFORMLY DOPED MOS STRUCTURES [J].
DOUCET, G ;
VANDEWIE.F .
SOLID-STATE ELECTRONICS, 1973, 16 (03) :417-423
[6]  
GAENSSLEN FH, 1973, SEP EUR SOL STAT DEV
[7]   THRESHOLD VOLTAGE AND GAIN TERM BETA OF ION-IMPLANTED ENHANCEMENT-MODE N-CHANNEL MOS-TRANSISTORS [J].
KAMOSHID.M .
APPLIED PHYSICS LETTERS, 1973, 22 (08) :404-405
[8]   STEADY-STATE MATHEMATICAL THEORY FOR INSULATED GATE FIELD-EFFECT TRANSISTOR [J].
KENNEDY, DP ;
MURLEY, PC .
IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 1973, 17 (01) :1-12
[9]   ANALYSIS OF THRESHOLD VOLTAGE FOR SHORT-CHANNEL IGFETS [J].
LEE, HS .
SOLID-STATE ELECTRONICS, 1973, 16 (12) :1407-1417
[10]   ION-IMPLANTED COMPLEMENTARY MOS-TRANSISTORS IN LOW-VOLTAGE CIRCUITS [J].
SWANSON, RM ;
MEINDL, JD .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1972, SC 7 (02) :146-+