CRRES MICROELECTRONIC TEST CHIP

被引：7

作者：

LIN, YS

BUEHLER, MG

RAY, KP

SOKOLOSKI, MM

机构：

[1] PHILLIPS LAB,BEDFORD,MA 01731

[2] NASA,OFF AERONAUT & EXPLORAT TECHNOL,WASHINGTON,DC 20546

来源：

IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 1991年 / 38卷 / 06期

关键词：

D O I：

10.1109/23.124162

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The JPL CRRES chip was designed and fabricated in 1985 and included in the CRRES MEP. MOSFET Matrix results show the effect of shielding on radiation-induced MOSFET threshold voltage shifts and channel mobility degradation. Shielded (middle board) MOSFETs have a threshold-voltage damage factor that is approximately three-orders of magnitude smaller than would be estimated from Co-60 ground tests. Unshielded (outer board) MOSFETs have a threshold-voltage damage factor that would be estimated from Co-60 ground tests. Temperature swings as large as 23-degrees-C with a 22.5 orbit periodicity affected the MOSFET data and was removed from the data in order to reveal the radiation effects. This experiment demonstrated the feasibility of characterizing MOSFETs in a matrix thus reducing the complexity and mass of the experiment.

引用

页码：1678 / 1685

页数：8

共 9 条

[1] A CMOS MATRIX FOR EXTRACTING MOSFET PARAMETERS BEFORE AND AFTER IRRADIATION [J].