AN INVESTIGATION OF ERASE-MODE DEPENDENT HOLE TRAPPING IN FLASH EEPROM MEMORY CELL

被引：32

作者：

HADDAD, S

CHI, C

WANG, A

BUSTILLO, J

LIEN, J

MONTALVO, T

VANBUSKIRK, M

机构：

[1] Advanced Micro Devices, Inc., Sunnyvale

来源：

IEEE ELECTRON DEVICE LETTERS | 1990年 / 11卷 / 11期

关键词：

D O I：

10.1109/55.63017

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Hot-hole generation during electrical erase in flash memory cells was investigated and found to be strongly dependent on the lateral electric field of the gated diode junction. It is shown, by erasing the memory cell at a low source voltage in combination with a negative gate voltage, that the operating point can be chosen well away from the onset of avalanche. Using this new erasing scheme appreciably reduces the amount of hole trapping in the tunnel oxide. As a result, data retention is significantly improved as compared with conventional erasure. © 1990 IEEE

引用

页码：514 / 516

页数：3

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