SILICON BIPOLAR CHIPSET WITH MAXIMUM DATA RATES FROM 10 TO 23 GBIT/S FOR OPTICAL COMMUNICATIONS

被引：4

作者：

HAUENSCHILD, J ^{[1
]}

BERTAGNOLLI, E ^{[1
]}

FELDER, A ^{[1
]}

REIN, HM ^{[1
]}

KLOSE, H ^{[1
]}

SCHMIDT, L ^{[1
]}

TREITINGER, L ^{[1
]}

WEGER, P ^{[1
]}

机构：

[1] SIEMENS AG,CORP RES & DEV,W-8000 MUNICH 83,GERMANY

来源：

ELECTRONICS LETTERS | 1991年 / 27卷 / 25期

关键词：

INTEGRATED CIRCUITS; BIPOLAR DEVICES; OPTICAL COMMUNICATION;

D O I：

10.1049/el:19911475

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A set of ICs for 10 Gbit/s for 10 Gbit/s optical fibre transmission systems are presented. The circuits were fabricated in a selfaligning double-polysilicon bipolar technology with 1-mu-m lithography. Measured values of the operating speed range from 10 Gbit/s (laser driver) to 23 Gbit/s (MUX).

引用

页码：2383 / 2385

页数：3

共 10 条

[1]

FELDER A, 1991, 1991 BIP CIRC TECHN

[2] DEMONSTRATION OF RETIMING CAPABILITY OF SILICON BIPOLAR TIME-DIVISION MULTIPLEXER OPERATING TO 24 GBIT/S [J].