HIGH-SPEED SELF-ALIGNED INP/GALNAS DOUBLE HETEROSTRUCTURE BIPOLAR-TRANSISTOR WITH HIGH CURRENT-DRIVING CAPABILITY

被引：5

作者：

SCHUMACHER, H

SHANTHARAMA, LG

HAYES, JR

BHAT, R

ESAGUI, R

KOZA, M

机构：

来源：

ELECTRONICS LETTERS | 1988年 / 24卷 / 20期

关键词：

D O I：

10.1049/el:19880881

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：1293 / 1294

页数：2

共 8 条

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LAMBERT, SA .

ELECTRONICS LETTERS, 1988, 24 (04) :228-229

[2] ALGAAS/GAAS HETEROJUNCTION BIPOLAR-TRANSISTORS FABRICATED USING A SELF-ALIGNED DUAL-LIFT-OFF PROCESS [J].

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ASBECK, PM ;

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MILLER, DL .

IEEE ELECTRON DEVICE LETTERS, 1987, 8 (07) :303-305

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IEEE ELECTRON DEVICE LETTERS, 1988, 9 (06) :312-314

[4] OMCVD-GROWN INP/GAINAS HETEROJUNCTION BIPOLAR-TRANSISTORS [J].

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BHAT, R ;

SCHUMACHER, H ;

KOZA, M .

ELECTRONICS LETTERS, 1987, 23 (24) :1298-1299

[5] ALGAAS/GAAS HETEROJUNCTION BIPOLAR-TRANSISTORS WITH SMALL SIZE FABRICATED BY A MULTIPLE SELF-ALIGNMENT PROCESS USING ONE MASK [J].

INADA, M ;

OTA, Y ;

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HIROSE, T ;

EDA, K .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1987, 34 (12) :2405-2411

[6] HIGH-PERFORMANCE ALGAAS/GAAS HBTS UTILIZING PROTON-IMPLANTED BURIED LAYERS AND HIGHLY DOPED BASE LAYERS [J].

NAKAJIMA, O ;

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YAMAUCHI, Y ;

ITO, H ;

ISHIBASHI, T .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1987, 34 (12) :2393-2398

[7] INGAAS/INP DOUBLE-HETEROSTRUCTURE BIPOLAR-TRANSISTORS WITH NEAR-IDEAL BETA-VERSUS IC CHARACTERISTIC [J].

NOTTENBURG, RN ;

TEMKIN, H ;

PANISH, MB ;

BHAT, R ;

BISCHOFF, JC .

IEEE ELECTRON DEVICE LETTERS, 1986, 7 (11) :643-645

[8]

Smith R. G., 1980, SEMICONDUCTOR DEVICE

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