THE INTERDEPENDENCE OF GEOMETRICAL, THERMAL, AND ELECTRICAL LIMITATIONS FOR VLSI LOGIC

被引:9
作者
FOLBERTH, OG
机构
关键词
D O I
10.1109/JSSC.1981.1051536
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:51 / 53
页数:3
相关论文
共 13 条
[1]   COMPARISON OF MOSFET LOGIC CIRCUITS [J].
COOK, PW ;
CRITCHLOW, DL ;
TERMAN, LM .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1973, SC 8 (05) :348-355
[2]  
FAGGIN F, 1978, IEEE SPECTRUM MAY, P28
[3]  
Folberth O. G., 1979, Microelectronics Journal, V9, P33
[4]   ULTIMATE SPEED-POWER-PRODUCT OF LOGIC TRANSISTOR CIRCUITS [J].
FOLBERTH, OG .
PROCEEDINGS OF THE INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, 1966, 54 (08) :1125-&
[5]  
FOLBERTH OG, 1974, INT ELEKTRON RUNDSCH, V28, P9
[6]   FUNDAMENTAL LIMITATIONS IN MICROELECTRONICS .1. MOS TECHNOLOGY [J].
HOENEISEN, B ;
MEAD, CA .
SOLID-STATE ELECTRONICS, 1972, 15 (07) :819-+
[7]   PHYSICAL LIMITS IN DIGITAL ELECTRONICS [J].
KEYES, RW .
PROCEEDINGS OF THE IEEE, 1975, 63 (05) :740-767
[8]   PHYSICAL LIMITS IN SEMICONDUCTOR ELECTRONICS [J].
KEYES, RW .
SCIENCE, 1977, 195 (4283) :1230-1235
[9]  
KEYES RW, 1969, IEEE SPECTRUM MAY, P36
[10]  
PAINKE H, 1979, NACHRICHTENTECH Z, V32, P370