Effect of Si lattice strain on the reliability characteristics of ultrathin SiO2 on a 4° tilted wafer

The electrical and structural characteristics of an ultrathin gate dielectric, thermally grown on 4degrees tilted wafer has been investigated. Compared with a control wafer, a relaxation of the Si lattice strain at the SiO2/Si(001) interface was observed for the 4degrees tilted wafer, which was confirmed by medium energy ion scattering spectroscopy. A significant improvement in the reliability characteristics of a metal-oxide-semiconductor (MOS) capacitor, with a 2.5-nm-thick gate oxide, grown on a tilt wafer was observed. This improvement in reliability can be explained by the relaxation of strain at the SiO2/Si interface. An ultrathin gate dielectric grown on a tilt wafer represents a promising alternative for gate dielectric applications in future MOS devices. (C) 2002 American Institute of Physics.