Analysis of high temperature effects on performances and hot-carrier degradation in DC/AC stressed 0.35 μm n-MOSFETs

被引:16
作者
Bravaix, A
Goguenheim, D
Revil, N
Vincent, E
Varrot, M
Mortini, P
机构
[1] Maison Technol, ISEM, F-83000 Toulon, France
[2] SGS Thomson Microelect, F-38926 Crolles, France
关键词
D O I
10.1016/S0026-2714(98)00166-8
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The transistor performances and hot-carrier reliability in n-MOSFETs are investigated at high temperature in the range 25-125 degrees C. A careful analysis of the temperature dependence of the device parameters shows that transistor performances are significantly reduced and that the Fermi potential, the mobility and current reductions, contribute to decrease the device sensitivity to the hot-carrier damage at high temperature. Different degradation behaviors are found between DC and AC stressing depending on the degradation mechanisms i.e. whether the interface trap generation or oxide charge trapping dominates which consequently exhibits a strong temperature dependence through their magnitude and localization. It is pointed out that the reduction of the ionization rate significantly impacts the degradation behaviors at elevated temperature. Even if the amount of generated damage is slightly larger than what effectively influences the transistor characteristics, the parameter insensitivity to given at high temperature improves the transistor reliability. This improvement is determined in the value of the device lifetime at 125 and 70 degrees C using inverter and pass transistor operations in a 0.35 mu m LDD complementary metal-oxide semiconductor (CMOS) technology suitable for 3.3 V operation. (C) 1999 Elsevier Science Ltd. All rights reserved.
引用
收藏
页码:35 / 44
页数:10
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