Failure modes of flip chip solder joints under high electric current density

被引：44

作者：

Basaran, C ^{[1
]}

Ye, H

Hopkins, DC

Frear, D

Lin, JK

机构：

[1] SUNY Buffalo, Elect Packaging Lab, Buffalo, NY 14260 USA

[2] Freescale Semciond Inc, Tempe, AZ USA

来源：

JOURNAL OF ELECTRONIC PACKAGING | 2005年 / 127卷 / 02期

关键词：

flip chip; solder joint reliability; electromigration; thermomigration; current stressing; high current density; power electronics; nanoelectronics;

D O I：

10.1115/1.1898338

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The failure modes of flip chip solder joints under high electrical current density are studied experimentally. Three different failure modes are reported. Only, one of the failure modes is caused by the combined effect of electromigration and thermomigration, where void nucleation and growth contribute to the ultimate failure of the module. The Ni under bump metallization-solder joint interface is found to be the favorite site for void nucleation and growth. The effect of pre-existing voids on the failure mechanism of a solder joint is also investigated.

引用

页码：157 / 163

页数：7

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