A current estimation method for bias-temperature stress of a-Si TFT device

被引：19

作者：

Shih, Ching-Chieh ^{[1
]}

Lee, Yeong-Shyang ^{[1
]}

Fang, Kuo-Lung ^{[1
]}

Chen, Ching-Hung ^{[1
]}

Gan, Feng-Yuan ^{[1
]}

机构：

[1] AU Optron Corp, Hsinchu 300, Taiwan

来源：

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY | 2007年 / 7卷 / 02期

关键词：

amorphous silicon; BTS; current estimation; reliability; TFT;

D O I：

10.1109/TDMR.2007.901068

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We have studied the time-dependence degradation of ON current of amorphous silicon thin-film transistors (a-Si:H TFTs), which is a function of stress duration, stress temperature, and stress bias. A simple method with stretched-exponential equation and current-voltage function is used to characterize and predict the TFT performance. Bias-temperature stress at different stress voltages has been performed on a-Si:H TFTs. A new method Using ON current degradation to analyze TFT device performance is presented, which is different from the conventional threshold-voltage shift method. We have also observed that the beta value in the ON current degradation method compared to the threshold-voltage shift method, with a stretched-exponential stress time, is related to beta similar to beta(0) - T-ST/T-O. Finally, we have also used the new equation to evaluate the performance of the gate-driver-on-array circuit in our products. If the limitation of the current for the pull-down device is 1 X 10(-6) A, then the operation time of the pull-down device can be estimated to about 1219 h when key pulled-down TFT is operating at 60 degrees C.

引用

页码：347 / 350

页数：4

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