High-performance EEPROM's using N- and P-channel polysilicon thin-film transistors with electron cyclotron resonance N2O-plasma oxide

被引：12

作者：

Lee, NI ^{[1
]}

Lee, JW

Kim, HS

Han, CH

机构：

[1] Korea Adv Inst Sci & Technol, Dept Elect Engn, Taejon 305701, South Korea

[2] Samsung Elect Co Ltd, Semidconduct R&D Ctr, Kyungki Do 449711, South Korea

来源：

IEEE ELECTRON DEVICE LETTERS | 1999年 / 20卷 / 01期

关键词：

EEPROM; ECR N2O-plasma oxide; endurance; poly-Si TFT; Qbd;

D O I：

10.1109/55.737559

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

High-performance EEPROM's using n- and p-channel polysilicon thin-film transistors (poly-Si TFT's) with electron cyclotron resonance (ECR) NaO-plasma oxide have been demonstrated. Both programming and erasing were accomplished by Fowler-Nordheim (F-N) tunneling within 1 ms regardless of programming and erasing voltages. The poly-Si TFT EEPROM's have a threshold voltage shift of 4 V between programmed and erased states; furthermore, maintain a large threshold voltage shift of 2.5 V after 1 x 10(5) program and erase cycles. This is attributed to the excellent charge-to-breakdown (Qbd) up to 10 C/cm(2) of ECR N2O-plasma oxide.

引用

页码：15 / 17

页数：3

共 10 条

[1]

ARAKAWA T, 1983, JPN J APPL PHYS, V22, P210

[2] A SIMPLE EEPROM CELL USING TWIN POLYSILICON THIN-FILM TRANSISTORS [J].

CAO, M ;

ZHAO, TM ;

SARASWAT, KC ;

PLUMMER, JD .

IEEE ELECTRON DEVICE LETTERS, 1994, 15 (08) :304-306

[3]

HEDGE RI, 1995, APPL PHYS LETT, V66, P2882

[4]

KOYAMA S, 1992, S VLSI TECHN, P44

[5] POLARITY ASYMMETRY OF OXIDES GROWN ON POLYCRYSTALLINE SILICON [J].

LEE, JC ;

HU, CM .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1988, 35 (07) :1063-1070

[6] HIGH-PERFORMANCE LOW-TEMPERATURE POLYSILICON THIN-FILM-TRANSISTOR USING ECR PLASMA THERMAL OXIDE AS GATE INSULATOR [J].

LEE, JY ;

HAN, CH ;

KIM, CK .

IEEE ELECTRON DEVICE LETTERS, 1994, 15 (08) :301-303

[7] Highly reliable polysilicon oxide grown by electron cyclotron resonance nitrous oxide plasma [J].

Lee, NI ;

Lee, JW ;

Hur, SH ;

Kim, HS ;

Han, CH .

IEEE ELECTRON DEVICE LETTERS, 1997, 18 (10) :486-488

[8] Effect of bottom polysilicon doping on the reliability of interpolyoxide grown using electron cyclotron resonance N2O-plasma [J].

Lee, NI ;

Lee, JW ;

Hur, SH ;

Kim, HS ;

Han, CH .

JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1998, 37 (3B) :1125-1128

[9] ELECTRICAL CHARACTERISTICS OF TEXTURED POLYSILICON OXIDE PREPARED BY A LOW-TEMPERATURE WAFER LOADING AND N-2 PREANNEALING PROCESS [J].

WU, SL ;

LIN, TY ;

LEE, CL ;

LEI, TF .

IEEE ELECTRON DEVICE LETTERS, 1993, 14 (03) :113-114

[10] The fabrication and characterization of EEPROM arrays on glass using a low-temperature poly-Si TFT process [J].

Young, ND ;

Harkin, G ;

Bunn, RM ;

McCulloch, DJ ;

French, DJ .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 1996, 43 (11) :1930-1936

← 1 →