High-performance RSD poly-Si TFTs with a new ONO gate dielectric

被引:5
作者
Chang, KM [1 ]
Yang, WC
Hung, BF
机构
[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu 300, Taiwan
[2] Natl Chiao Tung Univ, Inst Elect, Hsinchu 300, Taiwan
关键词
gate dielectric; N2O-plasma oxynitride; oxide-nitride-oxide (ONO); raised source/drain (RSD); thin-film transistors (TFTs);
D O I
10.1109/TED.2004.827382
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper developed a novel polycrystalline silicon (poly-Si) thin-film transistor (TFT) structure with the special features: 1) a new oxide-nitride-oxynitride (ONO) multilayer gate dielectric to reduce leakage current, improved breakdown characteristics, and enhanced reliability; and 2) raised source/drain (RSD) structure to reduce series resistance. These features were used to fabricate high-performance RSD-TFTs with ONO gate dielectric. The ONO gate dielectric on poly-Si films shows a very high breakdown field of 9.4 MV/cm, a longer time dependent dielectric breakdown, larger QBD, and a lower charge-trapping rate than single-layer plasma-enhanced chemical vapor deposition tetraethooxysilane oxide or nitride. The fabricated RSD-TFTs with ONO gate dielectric exhibited excellent transfer characteristics, high field-effect mobility of 320 cm(2) /V . s, and an on/off current ratio exceeding 10(8).
引用
收藏
页码:995 / 1001
页数:7
相关论文
共 31 条
[1]   RECESSED-CHANNEL STRUCTURE FOR FABRICATING ULTRATHIN SOI MOSFET WITH LOW SERIES RESISTANCE [J].
CHAN, MS ;
ASSADERAGHI, F ;
PARKE, SA ;
HU, CM ;
KO, PK .
IEEE ELECTRON DEVICE LETTERS, 1994, 15 (01) :22-24
[2]   Electrical characteristics of low temperature polysilicon TFT with a novel TEOS/oxynitride stack gate dielectric [J].
Chang, KM ;
Yang, WC ;
Tsai, CP .
IEEE ELECTRON DEVICE LETTERS, 2003, 24 (08) :512-514
[3]   EXCIMER-LASER CRYSTALLIZED POLY-SI TFTS WITH MOBILITY OF MORE THAN 600 CM2/VS [J].
CHOI, DH ;
SADAYUKI, E ;
SUGIURA, O ;
MATSUMURA, M .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1993, 40 (11) :2129-2129
[4]  
Chung KH, 2002, INTERNATIONAL ELECTRON DEVICES 2002 MEETING, TECHNICAL DIGEST, P385, DOI 10.1109/IEDM.2002.1175859
[5]  
HAN S, 2000, P IEEE PLASM PROC IN, P133
[6]   HIGH-QUALITY POLYSILICON BY AMORPHOUS LOW-PRESSURE CHEMICAL VAPOR-DEPOSITION [J].
HARBEKE, G ;
KRAUSBAUER, L ;
STEIGMEIER, EF ;
WIDMER, AE ;
KAPPERT, HF ;
NEUGEBAUER, G .
APPLIED PHYSICS LETTERS, 1983, 42 (03) :249-251
[7]   Source/drain engineering for sub-100 nm CMOS using selective epitaxial growth technique [J].
Hokazono, A ;
Ohuchi, K ;
Miyano, K ;
Mizushima, I ;
Tsunashima, Y ;
Toyoshima, Y .
INTERNATIONAL ELECTRON DEVICES MEETING 2000, TECHNICAL DIGEST, 2000, :243-246
[8]  
Huang X., 1999, IEDM Tech. Dig, P67, DOI DOI 10.1109/IEDM.1999.823848
[9]  
HWANG JM, 1994, S VLSI TECH, P33
[10]  
IBARAKI N, 1990, IEDM, P97