Extraction of the oxide charges at the silicon substrate interface in Silicon-On-Insulator MOSFET's

被引：12

作者：

Pavanello, MA ^{[1
]}

Martino, JA ^{[1
]}

机构：

[1] Univ Sao Paulo, Escola Politec, Lab Sist Integraveis, BR-05508900 Sao Paulo, Brazil

来源：

SOLID-STATE ELECTRONICS | 1999年 / 43卷 / 11期

基金：

巴西圣保罗研究基金会;

关键词：

D O I：

10.1016/S0038-1101(99)00178-1

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new method for extracting the fixed and interface trap densities at the buried oxide/silicon substrate interface in enhancement-mode and accumulation-mode Silicon-On-Insulator MOSFET's is presented. The method is based in the measurement of the front threshold voltage and body threshold voltage as a function of the applied back gate bias for enhancement-mode and accumulation-mode devices, respectively, at room and at cryogenic temperatures. Fixed charge density extraction is made at room temperature and the trapped charge density is extracted at cryogenic temperature. The validity of the proposed technique is demonstrated at liquid nitrogen temperature by two dimensional simulation and experiments. (C) 1999 Published by Elsevier Science Ltd. All rights reserved.

引用

页码：2039 / 2046

页数：8

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