OPEN FOLDED BIT-LINE ARRANGEMENT FOR ULTRA-HIGH-DENSITY DRAMS

被引:13
作者
TAKASHIMA, D
WATANABE, S
NAKANO, H
OOWAKI, Y
OHUCHI, K
机构
[1] Ulsi Research Center, Research and Development Center, Toshiba Corporation, Kawasaki
关键词
D O I
10.1109/4.280706
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An open/folded bit-line (BL) arrangement for scaled DRAM's is proposed. This BL arrangement offers small die size and good array noise immunity. In this arrangement, one BL of an open BL pair is placed in between a folded BL pair, and the sense amplifiers (SA's) for open BL's and those for folded BL's are placed alternately between the memory arrays. This arrangement features a small 6F2 memory cell, where F is the device feature size, and a relaxed SA pitch of 6F. The die size of a 64-Mb DRAM can be reduced to 81.6% compared with the one using the conventional folded BL arrangement. The BL-BL coupling noise is reduced to one-half of that of the conventional folded BL arrangement, thanks to the shield effect. Two new circuit techniques, 1) a multiplexer for connecting BL's to SA's, and 2) a binary-to-ternary code converter for the multiplexer have been developed to realize the new BL arrangement.
引用
收藏
页码:539 / 542
页数:4
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