TOTAL DOSE RADIATION-HARDENED LATCH-UP FREE CMOS STRUCTURES FOR RADIATION-TOLERANT VLSI DESIGNS

被引：14

作者：

HATANO, H ^{[1
]}

TAKATSUKA, S ^{[1
]}

机构：

[1] TOSHIBA MICROCOMP ENGN CORP,KAWASAKI 210,JAPAN

来源：

IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 1986年 / 33卷 / 06期

关键词：

D O I：

10.1109/TNS.1986.4334631

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：1505 / 1509

页数：5

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