RADIATION-TOLERANT HIGH-PERFORMANCE CMOS VLSI CIRCUIT-DESIGN

被引:11
作者
HATANO, H
DOI, K
机构
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D O I
10.1109/TNS.1985.4334063
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
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页码:4031 / 4035
页数:5
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共 17 条
[1]   SOS DEVICE RADIATION EFFECTS AND HARDENING [J].
BUCHANAN, BL ;
NEAMEN, DA ;
SHEDD, WM .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1978, 25 (08) :959-970
[2]   DESIGN OF ION-IMPLANTED MOSFETS WITH VERY SMALL PHYSICAL DIMENSIONS [J].
DENNARD, RH ;
GAENSSLEN, FH ;
YU, HN ;
RIDEOUT, VL ;
BASSOUS, E ;
LEBLANC, AR .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1974, SC 9 (05) :256-268
[3]   PROCESS OPTIMIZATION OF RADIATION-HARDENED CMOS INTEGRATED-CIRCUITS [J].
DERBENWICK, GF ;
GREGORY, BL .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1975, 22 (06) :2151-2156
[4]   TOTAL DOSE AND DOSE-RATE RADIATION CHARACTERIZATION OF EPI-CMOS RADIATION HARDENED MEMORY AND MICROPROCESSOR DEVICES [J].
GINGERICH, BL ;
HERMSEN, JM ;
LEE, JC ;
SCHROEDER, JE .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1984, 31 (06) :1332-1336
[5]  
Hatano H., 1981, International Electron Devices Meeting, P359
[6]   CMOS SHIFT REGISTER CIRCUITS FOR RADIATION TOLERANT VLSIS [J].
HATANO, H ;
SAKAUE, K ;
NARUKE, K .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 1984, 31 (05) :1034-1038
[7]   CMOS LOGIC-CIRCUIT OPTIMUM DESIGN FOR RADIATION TOLERANCE [J].
HATANO, H ;
SHIBUYA, M .
ELECTRONICS LETTERS, 1983, 19 (23) :977-979
[8]   TOTAL DOSE RADIATION EFFECTS ON CMOS RING OSCILLATORS OPERATING DURING IRRADIATION [J].
HATANO, H ;
SHIBUYA, M .
IEEE ELECTRON DEVICE LETTERS, 1983, 4 (12) :435-437
[9]  
HATANO H, 1985, 4TH P S FUT EL DEV, P111
[10]   AN 18-NS CMOS-SOS 4K STATIC RAM [J].
ISOBE, M ;
UCHIDA, Y ;
MAEGUCHI, K ;
MOCHIZUKI, T ;
KIMURA, M ;
HATANO, H ;
MIZUTANI, Y ;
TANGO, H .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1981, 16 (05) :460-465