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THE DYNAMICS OF LATCHUP TURN-ON BEHAVIOR IN SCALED CMOS
被引:18
作者
:
ODANAKA, S
论文数:
0
引用数:
0
h-index:
0
ODANAKA, S
WAKABAYASHI, M
论文数:
0
引用数:
0
h-index:
0
WAKABAYASHI, M
OHZONE, T
论文数:
0
引用数:
0
h-index:
0
OHZONE, T
机构
:
来源
:
IEEE TRANSACTIONS ON ELECTRON DEVICES
|
1985年
/ 32卷
/ 07期
关键词
:
D O I
:
10.1109/T-ED.1985.22120
中图分类号
:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号
:
0808 ;
0809 ;
摘要
:
引用
收藏
页码:1334 / 1340
页数:7
相关论文
共 14 条
[1]
MODELS FOR COMPUTER-SIMULATION OF COMPLETE IC FABRICATION PROCESS
[J].
ANTONIADIS, DA
论文数:
0
引用数:
0
h-index:
0
机构:
STANFORD UNIV,INTEGRATED CIRCUITS LAB,STANFORD,CA 94305
STANFORD UNIV,INTEGRATED CIRCUITS LAB,STANFORD,CA 94305
ANTONIADIS, DA
;
DUTTON, RW
论文数:
0
引用数:
0
h-index:
0
机构:
STANFORD UNIV,INTEGRATED CIRCUITS LAB,STANFORD,CA 94305
STANFORD UNIV,INTEGRATED CIRCUITS LAB,STANFORD,CA 94305
DUTTON, RW
.
IEEE JOURNAL OF SOLID-STATE CIRCUITS,
1979,
14
(02)
:412
-422
[2]
2-DIMENSIONAL CARRIER FLOW IN A TRANSISTOR STRUCTURE UNDER NONISOTHERMAL CONDITIONS
[J].
GAUR, SP
论文数:
0
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0
h-index:
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机构:
IBM CORP, SYST PROD DIV, POUGHKEEPSIE, NY 12602 USA
GAUR, SP
;
NAVON, DH
论文数:
0
引用数:
0
h-index:
0
机构:
IBM CORP, SYST PROD DIV, POUGHKEEPSIE, NY 12602 USA
NAVON, DH
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1976,
23
(01)
:50
-57
[3]
NONPLANAR VLSI DEVICE ANALYSIS USING THE SOLUTION OF POISSON EQUATION
[J].
GREENFIELD, JA
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DUTTON, RW
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IEEE TRANSACTIONS ON ELECTRON DEVICES,
1980,
27
(08)
:1520
-1532
[4]
SELF-CONSISTENT ITERATIVE SCHEME FOR 1-DIMENSIONAL STEADY STATE TRANSISTOR CALCULATIONS
[J].
GUMMEL, HK
论文数:
0
引用数:
0
h-index:
0
GUMMEL, HK
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1964,
ED11
(10)
:455
-&
[5]
Hu G. J., 1982, International Electron Devices Meeting. Technical Digest, P710
[6]
A BETTER UNDERSTANDING OF CMOS LATCH-UP
[J].
HU, GJ
论文数:
0
引用数:
0
h-index:
0
机构:
IBM CORP,THOMAS J WATSON RES CTR,RES STAFF,YORKTOWN HTS,NY 10598
IBM CORP,THOMAS J WATSON RES CTR,RES STAFF,YORKTOWN HTS,NY 10598
HU, GJ
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1984,
31
(01)
:62
-67
[7]
TWO-DIMENSIONAL SIMULATION OF LATCH-UP IN CMOS STRUCTURE
[J].
HU, GJ
论文数:
0
引用数:
0
h-index:
0
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IBM CORP,THOMAS J WATSON RES CTR,YORKTOWN HTS,NY 10598
IBM CORP,THOMAS J WATSON RES CTR,YORKTOWN HTS,NY 10598
HU, GJ
;
PINTO, MR
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0
引用数:
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IBM CORP,THOMAS J WATSON RES CTR,YORKTOWN HTS,NY 10598
IBM CORP,THOMAS J WATSON RES CTR,YORKTOWN HTS,NY 10598
PINTO, MR
;
KORDIC, S
论文数:
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机构:
IBM CORP,THOMAS J WATSON RES CTR,YORKTOWN HTS,NY 10598
IBM CORP,THOMAS J WATSON RES CTR,YORKTOWN HTS,NY 10598
KORDIC, S
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1982,
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(10)
:1695
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[8]
SILICON-GATE N-WELL CMOS PROCESS BY FULL ION-IMPLANTATION TECHNOLOGY
[J].
OHZONE, T
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OHZONE, T
;
SHIMURA, H
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SHIMURA, H
;
TSUJI, K
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0
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TSUJI, K
;
HIRAO, T
论文数:
0
引用数:
0
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0
HIRAO, T
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1980,
27
(09)
:1789
-1795
[9]
DC HOLDING AND DYNAMIC TRIGGERING CHARACTERISTICS OF BULK CMOS LATCHUP
[J].
RUNG, RD
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0
引用数:
0
h-index:
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机构:
TOSHIBA CORP,SEMICOND DEVICE ENGN LAB,KAWASAKI 210,JAPAN
TOSHIBA CORP,SEMICOND DEVICE ENGN LAB,KAWASAKI 210,JAPAN
RUNG, RD
;
MOMOSE, H
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0
引用数:
0
h-index:
0
机构:
TOSHIBA CORP,SEMICOND DEVICE ENGN LAB,KAWASAKI 210,JAPAN
TOSHIBA CORP,SEMICOND DEVICE ENGN LAB,KAWASAKI 210,JAPAN
MOMOSE, H
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1983,
30
(12)
:1647
-1655
[10]
A RETROGRADE P-WELL FOR HIGHER DENSITY CMOS
[J].
RUNG, RD
论文数:
0
引用数:
0
h-index:
0
RUNG, RD
;
DELLOCA, CJ
论文数:
0
引用数:
0
h-index:
0
DELLOCA, CJ
;
WALKER, LG
论文数:
0
引用数:
0
h-index:
0
WALKER, LG
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1981,
28
(10)
:1115
-1119
←
1
2
→
共 14 条
[1]
MODELS FOR COMPUTER-SIMULATION OF COMPLETE IC FABRICATION PROCESS
[J].
ANTONIADIS, DA
论文数:
0
引用数:
0
h-index:
0
机构:
STANFORD UNIV,INTEGRATED CIRCUITS LAB,STANFORD,CA 94305
STANFORD UNIV,INTEGRATED CIRCUITS LAB,STANFORD,CA 94305
ANTONIADIS, DA
;
DUTTON, RW
论文数:
0
引用数:
0
h-index:
0
机构:
STANFORD UNIV,INTEGRATED CIRCUITS LAB,STANFORD,CA 94305
STANFORD UNIV,INTEGRATED CIRCUITS LAB,STANFORD,CA 94305
DUTTON, RW
.
IEEE JOURNAL OF SOLID-STATE CIRCUITS,
1979,
14
(02)
:412
-422
[2]
2-DIMENSIONAL CARRIER FLOW IN A TRANSISTOR STRUCTURE UNDER NONISOTHERMAL CONDITIONS
[J].
GAUR, SP
论文数:
0
引用数:
0
h-index:
0
机构:
IBM CORP, SYST PROD DIV, POUGHKEEPSIE, NY 12602 USA
GAUR, SP
;
NAVON, DH
论文数:
0
引用数:
0
h-index:
0
机构:
IBM CORP, SYST PROD DIV, POUGHKEEPSIE, NY 12602 USA
NAVON, DH
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1976,
23
(01)
:50
-57
[3]
NONPLANAR VLSI DEVICE ANALYSIS USING THE SOLUTION OF POISSON EQUATION
[J].
GREENFIELD, JA
论文数:
0
引用数:
0
h-index:
0
GREENFIELD, JA
;
DUTTON, RW
论文数:
0
引用数:
0
h-index:
0
DUTTON, RW
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1980,
27
(08)
:1520
-1532
[4]
SELF-CONSISTENT ITERATIVE SCHEME FOR 1-DIMENSIONAL STEADY STATE TRANSISTOR CALCULATIONS
[J].
GUMMEL, HK
论文数:
0
引用数:
0
h-index:
0
GUMMEL, HK
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1964,
ED11
(10)
:455
-&
[5]
Hu G. J., 1982, International Electron Devices Meeting. Technical Digest, P710
[6]
A BETTER UNDERSTANDING OF CMOS LATCH-UP
[J].
HU, GJ
论文数:
0
引用数:
0
h-index:
0
机构:
IBM CORP,THOMAS J WATSON RES CTR,RES STAFF,YORKTOWN HTS,NY 10598
IBM CORP,THOMAS J WATSON RES CTR,RES STAFF,YORKTOWN HTS,NY 10598
HU, GJ
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1984,
31
(01)
:62
-67
[7]
TWO-DIMENSIONAL SIMULATION OF LATCH-UP IN CMOS STRUCTURE
[J].
HU, GJ
论文数:
0
引用数:
0
h-index:
0
机构:
IBM CORP,THOMAS J WATSON RES CTR,YORKTOWN HTS,NY 10598
IBM CORP,THOMAS J WATSON RES CTR,YORKTOWN HTS,NY 10598
HU, GJ
;
PINTO, MR
论文数:
0
引用数:
0
h-index:
0
机构:
IBM CORP,THOMAS J WATSON RES CTR,YORKTOWN HTS,NY 10598
IBM CORP,THOMAS J WATSON RES CTR,YORKTOWN HTS,NY 10598
PINTO, MR
;
KORDIC, S
论文数:
0
引用数:
0
h-index:
0
机构:
IBM CORP,THOMAS J WATSON RES CTR,YORKTOWN HTS,NY 10598
IBM CORP,THOMAS J WATSON RES CTR,YORKTOWN HTS,NY 10598
KORDIC, S
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1982,
29
(10)
:1695
-1695
[8]
SILICON-GATE N-WELL CMOS PROCESS BY FULL ION-IMPLANTATION TECHNOLOGY
[J].
OHZONE, T
论文数:
0
引用数:
0
h-index:
0
OHZONE, T
;
SHIMURA, H
论文数:
0
引用数:
0
h-index:
0
SHIMURA, H
;
TSUJI, K
论文数:
0
引用数:
0
h-index:
0
TSUJI, K
;
HIRAO, T
论文数:
0
引用数:
0
h-index:
0
HIRAO, T
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1980,
27
(09)
:1789
-1795
[9]
DC HOLDING AND DYNAMIC TRIGGERING CHARACTERISTICS OF BULK CMOS LATCHUP
[J].
RUNG, RD
论文数:
0
引用数:
0
h-index:
0
机构:
TOSHIBA CORP,SEMICOND DEVICE ENGN LAB,KAWASAKI 210,JAPAN
TOSHIBA CORP,SEMICOND DEVICE ENGN LAB,KAWASAKI 210,JAPAN
RUNG, RD
;
MOMOSE, H
论文数:
0
引用数:
0
h-index:
0
机构:
TOSHIBA CORP,SEMICOND DEVICE ENGN LAB,KAWASAKI 210,JAPAN
TOSHIBA CORP,SEMICOND DEVICE ENGN LAB,KAWASAKI 210,JAPAN
MOMOSE, H
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1983,
30
(12)
:1647
-1655
[10]
A RETROGRADE P-WELL FOR HIGHER DENSITY CMOS
[J].
RUNG, RD
论文数:
0
引用数:
0
h-index:
0
RUNG, RD
;
DELLOCA, CJ
论文数:
0
引用数:
0
h-index:
0
DELLOCA, CJ
;
WALKER, LG
论文数:
0
引用数:
0
h-index:
0
WALKER, LG
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1981,
28
(10)
:1115
-1119
←
1
2
→