PHYSICAL BACKGROUND OF SUBSTRATE CURRENT CHARACTERISTICS AND HOT-CARRIER IMMUNITY IN SHORT-CHANNEL ULTRATHIN-FILM MOSFETS/SIMOX

被引:13
作者
OMURA, Y
IZUMI, K
机构
[1] NTT LSI Laboratories, Atsugi
关键词
D O I
10.1109/16.275220
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We show experimentally that, in contrast to past simulation results, I-SUB(max)/I-D decreases with decreasing silicon layer thickness. This is supported by two-dimensional numerical simulation results: the above phenomenon results from the nonlocal effect and the slightly gate-overlapped LDD structure. We also show that the velocity overshoot effect can suppress I-SUB(max)/I-D in short-channel MOSFET/SIMOX. It is demonstrated that 0.1-mu m-gate ultrathin-film nMOSFET/SIMOX will have a 10-year lifetime at the supply voltage of 1.6 V, although an abnormal degradation is indicated in such an extremely short-channel SOI device.
引用
收藏
页码:352 / 358
页数:7
相关论文
共 22 条
[1]   AN INVESTIGATION OF STEADY-STATE VELOCITY OVERSHOOT IN SILICON [J].
BACCARANI, G ;
WORDEMAN, MR .
SOLID-STATE ELECTRONICS, 1985, 28 (04) :407-416
[2]   SINGLE-TRANSISTOR LATCH IN SOI MOSFETS [J].
CHEN, CED ;
MATLOUBIAN, M ;
SUNDARESAN, R ;
MAO, BY ;
WEI, CC ;
POLLACK, GP .
IEEE ELECTRON DEVICE LETTERS, 1988, 9 (12) :636-638
[3]  
Chen J., 1991, 1991 IEEE International SOI Conference Proceedings (Cat. No.91CH3053-6), P8, DOI 10.1109/SOI.1991.162830
[4]   HOT-ELECTRON EFFECTS IN SILICON-ON-INSULATOR N-CHANNEL MOSFET [J].
COLINGE, JP .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1987, 34 (10) :2173-2177
[5]   SOI DESIGN FOR COMPETITIVE CMOS VLSI [J].
FOSSUM, JG ;
CHOI, JY ;
SUNDARESAN, R .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1990, 37 (03) :724-729
[6]   ENHANCED RELIABILITY IN SI MOSFETS WITH CHANNEL LENGTHS UNDER 0.2 MICRON [J].
HENRICKSON, L ;
PENG, ZZ ;
FREY, J ;
GOLDSMAN, N .
SOLID-STATE ELECTRONICS, 1990, 33 (10) :1275-1278
[7]   INTERFACE-TRAP GENERATION MODELING OF FOWLER-NORDHEIM TUNNEL INJECTION INTO ULTRA-THIN GATE OXIDE [J].
HORIGUCHI, S ;
KOBAYASHI, T ;
SAITO, K .
JOURNAL OF APPLIED PHYSICS, 1985, 58 (01) :387-391
[8]   CMOS DEVICES FABRICATED ON BURIED SIO2 LAYERS FORMED BY OXYGEN IMPLANTATION INTO SILICON [J].
IZUMI, K ;
DOKEN, M ;
ARIYOSHI, H .
ELECTRONICS LETTERS, 1978, 14 (18) :593-594
[9]  
MAKINO T, 1991, 1991 INT C SOL STAT, P20
[10]  
NAKAMURA K, 1991, T IEICE, P147