A SILICON-BIPOLAR AMPLIFIER FOR 10 GBIT/S WITH 45 DB GAIN

被引：10

作者：

POHLMANN, W

机构：

[1] Alcatel SEL Research Cent, Stuttgart

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1994年 / 29卷 / 05期

关键词：

D O I：

10.1109/4.284704

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 10 Gbit/s limiting main amplifier for use in optical transmission systems was implemented in an advanced 0.4 mum silicon-bipolar technology. The device has one differential input and two differential outputs. It is mounted and bonded on a softboard carrier for all of the following measurements. The small signal differential gain is 45 dB and the bandwidth is 9 GHz. The output voltage is limited to 400 mV(pp) differential at each output. The minimum input voltage for 1.10(-9) biterror ratio at a pseudo random word of length 2(23) - 1 was measured to be 2.25 mV(pp). The chip area is 1.8 mm x 3.1 mm. The power dissipation is 400 mW at a single supply voltage of - 4V.

引用

页码：551 / 556

页数：6

共 9 条

[1] A DESIGN AND PACKAGING TECHNIQUE FOR A HIGH-GAIN, GIGAHERTZ-BAND SINGLE-CHIP AMPLIFIER [J].