AN 8-NS 1-MBIT ECL BICMOS SRAM WITH DOUBLE-LATCH ECL-TO-CMOS-LEVEL CONVERTERS

被引：12

作者：

MATSUI, M ^{[1
]}

MOMOSE, H ^{[1
]}

URAKAWA, Y ^{[1
]}

MAEDA, T ^{[1
]}

SUZUKI, A ^{[1
]}

URAKAWA, N ^{[1
]}

SATO, K ^{[1
]}

MATSUNAGA, J ^{[1
]}

OCHII, K ^{[1
]}

机构：

[1] TOSHIBA MICROELECTR CORP, KAWASAKI, JAPAN

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1989年 / 24卷 / 05期

关键词：

D O I：

10.1109/JSSC.1989.572585

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：1226 / 1232

页数：7

共 9 条

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[8]

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[9] AN 8-NS 256K ECL SRAM WITH CMOS MEMORY ARRAY AND BATTERY BACKUP CAPABILITY [J].

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